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| ID | Category | Severity | Reproducibility | Date Submitted | Last Update | |||||||
| 0000063 | [ethersex] Feature Request | minor | N/A | 2009-04-19 18:42 | 2009-04-19 18:42 | |||||||
| Reporter | veyron | View Status | public | |||||||||
| Assigned To | ||||||||||||
| Priority | normal | Resolution | open | |||||||||
| Status | new | |||||||||||
| Summary | 0000063: use m4 to manage PCINTx | |||||||||||
| Description |
Toll währe eine automatisierte Initialisierung der Register: PCMSK0 |= _BV(PCINT0); PCICR |= _BV(PCIE0); abhängig von dem im pinning konfigurierten Eingang: /* port config for DCF77 */ DCF77_USE_PCINT(0) Auch der Vector: SIGNAL (PCINT0_vect) sollte automatisch richtig gesetzt werden. Siehe auch 'hardware/clock/dcf77/dcf77.c' TODO use m4 to manage PCINTx |
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